MICELEC (NA2)

Facilitate access to deep submicron technologies for radiation-tolerant microelectronics developments for front-end and readout ASICs. Design support and ILC coordinated access to a commercial silicon foundry for prototyping and production of integrated circuits in deep submicron CMOS technologies will be provided. This task consists of the following parts:

Characterization, validation and monitoring of the radiation tolerance of the selected technologies and development of a radiation-tolerant design methodology;
Provision of a design kit, including a digital library, to customize Europractice based CAE tools to the radiation-tolerant design methodology;
Adaptation of analogue models for ILC front-end electronics applications;
Provision of the commercial and technical interface to the silicon foundry for:

organization of shared multi-project wafer and/or mutli-project reticle runs

organization of engineering and production runs

liasing with the manufacturer for post-production diagnostics and failure analysis

One participant contributes to this task: CERN.

Task coordinator: Alessandro Marchioro (CERN)